The present invention relates to a method of fabricating a wiring board.
In recent years, the tendency toward increasing the number of wiring layers and promotion of a fine structure thereof has proceeded owing to the increasing integration and speed of LSIs. Particularly, in order to realize enhancement of transistor characteristics in logic devices, it is essential to reduce a minimum pitch of wiring in accordance with the gate length. Accordingly, the technology of forming fine wiring becomes essential.
As such a technology of forming fine wiring, a damascene process in which an etching process is not needed has been replaced with the conventional dry etching process used in Al wiring technology and becomes mainstream. The damascene process is classified into a single damascene process and a dual damascene process.
In the single damascene process, a groove in which wiring is to be formed is formed in an interlayer insulating film by etching. A barrier metal layer as a diffusion prevention layer is deposited on the interlayer insulating film, and then a Cu film is deposited on the barrier metal layer. Subsequently, the Cu film and the barrier metal layer which are disposed in an upper portion of the groove are removed by chemical mechanical polishing (CMP) or the like and planarization is performed to thereby form the wiring. In contrast, in the dual damascene process, via holes through which electrical contact between upper and lower wiring layers is made are formed simultaneously with the wiring groove. The wiring and via plugs are simultaneously formed by performing deposition of a barrier metal layer, deposition of a Cu film and CMP one time for each. These steps are repeatedly carried out until a necessary number of layers are obtained. As a result, multilayered wiring can be formed.
As explained above, in the damascene process, in any of these two damascene processes (the single and dual damascene processes), it is necessary to form the wiring groove. Conventionally, for instance, as disclosed in Japanese Patent Application Unexamined Publication No. 2006-49804, spot processing is conducted by spot irradiation with a laser such as a carbon dioxide laser and a YAG laser, and the spot processing is repeatedly carried out a plurality of times to thereby form the above-described wiring groove.
Japanese Patent No. 4127448 discloses a method of fabricating a wiring board. In this method, an opening is formed in an outermost resist layer on an upper surface side of the wiring board by surface irradiation with an excimer laser, and a larger diameter opening is formed in a resist layer on a lower surface side of the wiring board by irradiation with a carbon dioxide gas laser, so that an exposed area of a metal terminal pad disposed on the lower surface side of the wiring board is increased to thereby establish good connection between the wiring board and an external connecting terminal of another wiring board or the like.